*Bitsilica is Hiring VLSI Trained M.Tech Freshers (2020/2019/2018) / B.Tech ( 2019/2018/2017) & Experienced Engineers*

*Location: hyderabad / bangalore*

*Job Details* :

Skilled in #systemverilog #uvm #verilog #vhdl
Good Knowledge on high speed #protocols

Interested professionals share ur profile to
careers@bitsilica.com


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